Adithya Pagolu
Layout Engineer at Micron Technology
Based in India
7-day free trial · no credit card
Seniority
Staff
Department
Engineering
Location
India
Industry
Semiconductor Manufacturing
Company size
40K
Contact information
Reveal Adithya's email and phone
Direct contact data is gated. Sign up and reveal. You only pay for verified records.
a•••••••@micron.com
Phone
5 credits+91 ••• •••• ••••
You only pay for valid records. Bounced emails and disconnected numbers cost nothing.
Background
About Adithya Pagolu
Experience in TSMC3nm, TSMC 7nm, GPDK45nm, TSMC 130nm & TSMC 180nm • Exposure on Cadence tools like Virtuoso-L, virtuoso-XL, Innovus, Calibre, Assura, PVS and CPDS verification Tool. • Knowledge of semiconductor devices and fabrication process including WPE, LOD, STI and Deep N-Well. • Good knowledge on floor planning, Power planning, multiple matching patterns, layout and physical verification of complex circuits. • Good understanding the importance of signal flow, clock routing and shielding. • Hands on fixing Latch up, EM, IR, SH and Antenna Effect and Shielding. • Strong Debugging skills in LVS and DRC.
Decision-makers
Other people at Micron Technology
Build a list of verified contacts at Micron Technology
Free for 7 days · 50 credits · no card · only pay for verified records.
Reach more buyers like Adithya
250M+ professionals with verified email and phone. You only pay for records that actually verify.
7-day trial · no credit card · cancel anytime