Adrish Chatterjee

Senior Mixed Signal Design Engineer at Nvidia

Based in New York, United States

View on LinkedIn

7-day free trial · no credit card

Seniority

Staff

Department

Engineering

Location

New York

Industry

Computer Hardware Manufacturing

Company size

45K

Contact information

Reveal Adrish's email and phone

Direct contact data is gated. Sign up and reveal. You only pay for verified records.

Email

1 credit

a•••••••@••••••.com

Phone

5 credits

+1 ••• •••• ••••

You only pay for valid records. Bounced emails and disconnected numbers cost nothing.

Background

About Adrish Chatterjee

I am a graduate student in Electrical Engineering at Columbia University. I have a prior experience of 5 years in Texas Instruments in the field of Analog Integrated circuits where I got the opportunity to work on a broad spectrum of roles for over five years—ranging from pre-Silicon Design to post-silicon Validation. As an Analog Design Engineer, I designed I2C Transceiver. The goal was to implement the “Unpowered-Hotswap”—a feature that prevents bus loading while the I2C device is either powered-off or powered-on. It was well-recognized first-pass silicon and was released to market (ISO1640). This design experience enhanced my knowledge my biasing circuits, LDO regulators, OpAmps, mismatch, non-linearity, and stability. As a DV (Design Verification) Engineer, I have been part of 7 successful tape-outs, all MCMs (Multi-Chip modules). During this time I gained analog/mixed-signal IC development (pre-silicon) experience including baseband filters, bandgap references, LDO regulators, PORs architectures, Verilog AMS modeling. and RTL design & synthesis. As Validation Engineer, I ensured post-silicon quality, understood customer applications, improved Validation-timelines through automation, and debugged root-cause anomalies in Devices. Going back and forth between the Design-Virtuoso Environment and Lab-testing environment, I was formulating experiments on the go for both Design-team and Validation-team, to either confirm or discard a theory. I unearthed bugs that were not found in the DV Environment and modified the simulation environment for the subsequent designs. What my team at TI valued the most in me was that I was always finding the root cause of critical bugs and fixing them, coming up with creative PCB-level architecture to solve problems that couldn't be solved in Design, and always seeking excellence and quality (0 DPPM for automotive grade), driving solutions independently to logical conclusions, and building a complete solution without relying on just one function/domain At Columbia University, I am pursuing a Master's in Electrical Engineering with a specialization in Integrated Circuits & Systems to further advance my knowledge in the domain of Analog Integrated circuits with courses like Advanced Analog IC Designing, and Milli- meter wave IC Designing, Digital VLSI Circuits, and Analog-Digital Interfaces. I am passionate about Analog IC Design, mmWave IC and systems, RF design, Mixed Signal Verification, and Validation.

Decision-makers

Other people at Nvidia

Browse the Nvidia team →

Build a list of verified contacts at Nvidia

Free for 7 days · 50 credits · no card · only pay for verified records.

Start free

Reach more buyers like Adrish

250M+ professionals with verified email and phone. You only pay for records that actually verify.

7-day trial · no credit card · cancel anytime

Adrish Chatterjee Email & Phone Number @ Nvidia | Kipplo Discover