Ashvini Byri

Background

About Ashvini Byri

Over 10 years of experience as a Hardware Engineer specializing in Architecture Performance Modeling, with experience in identifying bottlenecks and improving performances- Successfully led the integration of NAND memory components and conducted comprehensive system simulations- Proven track record in driving performance measurements using Delphi- Extensive experience leading cross-functional teams for seamless system design integration and bottleneck troubleshooting- Skilled in the implementation of advanced system features for enhanced capabilities and robustness- Demonstrated proficiency in executing end-to-end traffic simulations on diverse architecture platforms- Proficient in leveraging performance measurement tools for detailed analysis of system performance metrics- Expertise in post-silicon DDR bring-up tests and implementing DDR read/write SHMOO for performance assessments- Proficient in multiple programming languages including Python, C++, C, Java, Perl, Verilog, VHDL, SystemVerilog, and well-versed with PCIe standards - Worked on tools like Trace32, Eclipse, Cadence Virtuoso, and Xilinx ISE- Continuous learner, seeking to expand expertise in post-silicon validation- Committed to consistently delivering high-quality results in SoC design, performance analysis, and memory validation- Open to networking with like-minded professionals in the field of hardware engineering and technological innovation.