Avinash Agarwal
Sr Process Engineer at Qorvo, Inc
Based in Portland, United States
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Seniority
Staff
Department
Engineering
Location
Portland
Industry
Semiconductor Manufacturing
Company size
6.4K
Contact information
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a•••••••@qorvo.com
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Background
About Avinash Agarwal
Semiconductor Process Engineering: Si and GaAs Process Technology Development, Sustaining, Continuous Improvement, New Tool Qualification and Fab Operations, through hands-on ownership, project and team leadership with 25+ years in the Industry Core Expertise: Plasma Etch, Ash, Wet Etch and Cleans, Ion Implantation, RTA, PECVD Thin Film Deposition, Process Integration and Defect Reduction. Hands on experience majority of Plasma Etch tools from Applied Materials [DPS, MxP, Centura], LAM [9400, 9600, 4400, 4520, 490, Alliance, Rainbow] and TEL [SCCM, DRM], SPTS, Trikon; Ashers; Wet Etch and Cleans tools, Axcelis/AMAT Implanters, Steag/Mattson RTA, Alloy/Anneal tracks, PECVD Dielectric deposition tools from Applied Materials and ASM, and entire spectrum of Metrology tools. Statistical Process Control, FMEA and Design of Experiments, Spotfire and JMP
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