Bhargavi Setlem

Background

About Bhargavi Setlem

I am a Master’s student specializing in VLSI and Physical Design, with strong hands-on experience in ASIC design flows and hardware optimization through academic and research-driven projects. At the University of Minnesota, I worked on Support Vector Machine( SVM), a memory design project where I implemented the full RTL-to-GDSII flow. This included floorplanning, placement, CTS, routing, timing closure, and physical verification (DRC/LVS) using Synopsys tools like ICC2 and PrimeTime. I recently completed a Backside Power Delivery Network (BSPDN) optimization project, where I used reinforcement learning (RL) to minimize IR drop by dynamically adjusting metal widths and grid configurations. The project focused on power integrity challenges in advanced technology nodes and demonstrated how AI-driven methods can improve traditional PDN design. I’m proficient in scripting with Tcl, experienced in Linux environments, and passionate about using both classical and ML-based techniques to solve physical design challenges. I’m currently seeking opportunities to apply my skills and contribute to cutting-edge semiconductor design and innovation.