David Cress

Background

About David Cress

Manager and IPT lead in ASIC design and verification with experience in program development, system specifications, physical implementation, and testing of custom designs. Broad exposure to ASIC development processes and flows, from custom cell and library development, modeling, logical testing and characterization, to ASIC silicon testing and debug. Process Development, optimization, and standardization. Specialties: System security focus on ASIC implementations with extensive ASIC front-end and back-end implementation to include specification and requirements development, Verilog and VHDL RTL coding, Simulation and Verification, Synthesis, DFT insertion. and optimization. Physical implementation, including floorplanning, clock tree insertion, routing and Static Timing Analysis.