David Rackley
Application Engineer Sr Staff, Physical Design at Synopsys Inc
Based in Daytona Beach, United States
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Seniority
Staff
Department
Other
Location
Daytona Beach
Industry
Software Development
Company size
28K
Contact information
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d•••••••@synopsys.com
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Background
About David Rackley
Strong semiconductor implementation skills with Physical design (P&R), constraints, design for test, static timing, synthesis, IR drop, formal, simulation verification, and modeling in both Verilog and VHDL. The usual industry tools, Synopsys, Cadence, Mentor, Magma, etc. with PERL/TCL. Chips are high volume commercial products typically high speed, power sensitive, with 3rd party IP and embedded microprocessors and peripherals. Been in the business since 2u, now it’s 5n - wow what a ride! Wide career experiences having also done FPGAs, PC boards, performed system integration and test, bench testing, trouble-shooting, and software. Strong telecom background.
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