Debolina Sen
Soc Design Eng Manager at Intel Corporation
Based in Fort Collins, United States
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Seniority
Manager
Department
Information Technology
Location
Fort Collins
Industry
Semiconductor Manufacturing
Company size
110K
Contact information
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d•••••••@intel.com
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Background
About Debolina Sen
Product Engineer with extensive knowledge in semiconductor device physics and proven record in the development of memory products from the design stage to mass production. Dynamic in both team-oriented and self-directed environments, supporting staff members and mentoring junior engineers. SKILL SET * Hardware verification and Debugging: Micro probing on silicon wafer, probing and testing packaged parts, waveform analysis using Oscilloscopes and Logic Analyzers * Hardware Languages: Verilog, VHDL * Simulation tools: Cadence in DF2 environment, Finesim, HSpice, Hsim, Nanosim, PSpice, LT Spice, OrCAD * Data Analysis Tools: JMP, MS Excel, Yield3, Micron proprietary data extraction tools and scripts in UNIX * Memory Testers: High speed DDR3/DDR4 testers including ADAVANTEST (T5501, T5511), Micron Proprietary Engineering and Micromate testers * Others: C, Windows, Unix, MATLAB, Perl, VxWorks, SAM
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