Deniz Guzel

Background

About Deniz Guzel

ASIC Verification Engineer with proven experience in verifying complex SoC designs using SystemVerilog and UVM across both Cadence and Synopsys environments.Skilled in full-chip ASIC verification flows with a strong command of UVM methodology and deep understanding of ISA and SoC architectures. Contributed to two commercial RISC-V SoC projects—one successfully taped out—and a high-performance AI video SoC based on an ARM platform. Also experienced in standalone RISC-V core verification.Maintain and drive complex SoC projects, implement and support CI/CD verification flows, and contribute to architecture design. Designed and implemented TLVE for advanced verification scenarios.