Dimitris Karavidas

Background

About Dimitris Karavidas

I started my career as a trainee Design Engineer with Philips BL PMU in 2002. After a few years in the Shipping Industry, I joined THETA Microelectronics S.A, Athens, as Jr Layout Engineer. where I worked with highly experienced and professional RF Design and Layout Engineers. Having become a Sr RF Layout Engineer with a big experience portfolio of RFIC projects, on May 2011 I moved to Consultancy for the Semiconductor Industry in Europe. My work in numerous projects together with experienced designers on VCOs, LNAs, LO chain, digital shifters, modeling, test benches for advanced RF modeling projects is a major plus on my experience and carrier. Working close with the designer, I learned to provide layout services together with a second "proof" approach for the circuits under design- something a Layouter must do under all circumstances, as this is the exact step that enhances the final performance of any IC project. Brief Experience Overview o Deep Submicron technology RF Layout o Deep Submicron technology reliability test vehicle o RX,PLL chain for hearing aid application in 45nm CMOS o Full IC layout of triband stand alone LNA in 250nm biCMOS. o Triband LNAs layout on 250nm biCMOS o Layout for full RFIC projects at 180nm BiCMOS (2.5 - 4GHz)and test RFIC at 90nm CMOS (60GHz). o Port, design and characterization of baseband blocks such as Bandgap Reference Circuit, x^2 o Power Signal Detector, DAC's and ADC's. o HSpice simulation test benches based on extracted layout netlists for technology characterization. o Technology migration for deep submicron projects o PCELL development based on SKILL programming Specialties: RF Layout (from low frequencies up to 60GHz and above), specialized on - VCO blocks- Mixer blocks- LNA blocks - Hybrid 20GHz Interface Top Level Layout - Transmitter 5GHz - Stand alone Tri Band LNA - Reliability Test Vehicle - RF Modeling structures