Dineshkumar Mylsamy

Background

About Dineshkumar Mylsamy

Electrical Engineering Graduate specialized in Digital VLSI Design at Arizona State University, actively seeking full-time opportunities in Hardware design. Have a good knowledge of Digital Design concepts, Verilog, Physical Design flow and working knowledge of EDA tools like Synopsis Design Compiler, Primetime, Cadence Virtuoso, Cadence Encounter & Innovus. I have a good knowledge of memory design like DRAM, SRAM and Register File Design. I have 2 year and 5 months of work experience at Ford Motor Company as a Test Analyst which helped me to hone my analytical and problem-solving skills.> Domains of expertise: Digital Systems and Circuit Design, Analog Integrated Circuits> EDA Tools (Backend): Cadence Virtuoso, StarRC, RTL Compiler For Synthesis, Encounter> HDL Languages: Verilog, SystemVerilog> Programming: Matlab, C/C++> Scripting Languages: TCL, PERL> Operating Systems of familiarity: Windows, Linux, Android> Related Coursework: Spring 2017: Digital Systems and Circuit Design, Analog Integrated Circuits, Low Power Bio-ElectronicsFall 2017: VLSI Design, Hardware Acceleration and FPGA, Constructionist Approach to Microprocessor DesignSpring 2018: Computer Architecture, Advanced Analog Integrated Circuits, Neuromorphic Computing Hardware Design