Dipali Kanoje
Ip Design Verification Engineer at Intel
Based in Pune, India
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Seniority
Staff
Department
Engineering
Location
Pune
Industry
Semiconductor Manufacturing
Company size
110K
Contact information
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d•••••••@intel.com
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Background
About Dipali Kanoje
Experienced Design Verification Engineer (11 years) with a history of working on verifying RTL designs for various industries like Automobile application, Digital storage, Aviation applications. Skilled in System Verilog and UVM. Experience in VMM, UVM, Testbench and Test component development.
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