Gajesh N.
Senior Layout Designer at Qorvo, Inc
Based in United Kingdom
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Seniority
Staff
Department
Engineering
Location
United Kingdom
Industry
Semiconductor Manufacturing
Company size
6.1K
Contact information
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g•••••••@qorvo.com
Phone
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Background
About Gajesh N.
18 yrs of exp. in Semiconductors IC layout design.>Area of best expertise lies in layout designs of all RF (transceiver ) Analog, & power management modules. Full-chip integration and releases (micro-controllers, GPS and IOT based chips (16nm, 22nm gf, 40nm and above )>Successfully released & tapped out multiple IPs and fullchips including RF IPs Tx/Rx Receiver,(LNA, Mixer, VCO & Tx -Rx integration); Analog IPs & blocks like PLL, OTP, OCP, Temperature sensor, Current sensor, SigmaDelta, SAR & Flash ADC, DPWM, Oscillator, Charge- pump, VCO, LDO, Hdram, DAC, Bandgap Reference, Full chip system integration. etc.>Worked as a part of Sales and Business development team of the company in parallel for increasing business prospects and company growth, managing and creating long term business relationship with existing clients and head hunting new clients.>Experience of working at client development centre at different geographical locations in Asia and Europe.>Experience of leading multiple teams( around 14 Engineers) on different projects simultaneously on different technology nodes 16nm & above. Supervising & mentoring while doing hands-on on projects. Involved in floorplan, placement routing from blocks till integration at chip level along with mentoring and supervising team to have quality and OTD. Brief Overview:> 2019-2023 : Worked at Broadcom Singapore to support layout design activities in Analog, digital and RF designs for automobiles( gate drivers & photodiode based sensor IPs). IPs supporting 40V/60V with 1-7Amp current drive.>(2018 Last project) Involved in leading 3-team on RF projects 22nm flipwell and 40nm & 300nm process in RF Transceiver designs. Past,>Worked as contractor in RF team at Qualcomm India on RF Nplier/PLL layouts for snapdragon processor in different technologies.>Worked as a Design Automation Eng. at Intel Corporation India at Infosys Technologies on P&R >Worked at Texas Instruments ODC, India with a design team of ULL-LP msp430 group Germany, released multiple msp430 microcontrollers guiding fresh graduates while learning from design team at TI at the same time.>Proficient with Cadence, Synopsys, Calibre and Assura verification tools and OS- Windows, Unix, and Linux.>In 2018-2019 get successful test result for layout @Qualinx: Project IC name: QLX300 GNSS (IoT device tracking) Ref: https://cordis.europa.eu/project/rcn/223932/factsheet/en?WT.mc_id=RSS-Feed & WT.rss_f=project & WT.rss_a=223932 & WT.rss_ev=a
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