Garima Arora
Member of Technical Staff at Amd
Based in Santa Clara, United States
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Seniority
Staff
Department
Information Technology
Location
Santa Clara
Industry
Semiconductor Manufacturing
Company size
48K
Contact information
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g•••••••@amd.com
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Background
About Garima Arora
Silicon Design Engineer with 8+ years of experience in RTL design, timing closure, and power optimization for high-speed PHY IPs. Delivered timing convergence for DDR and SERDES across 7nm–3nm nodes, contributing to first-pass silicon and power-efficient designs in data center and AI platforms.
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