Harshinder Singh

Background

About Harshinder Singh

Transforming Complex Designs into High-Performance Chips | Physical Design Engineer | Synthesis Engineer. With a passion for pushing the boundaries of VLSI design, I specialize in physical design and synthesis engineering, leveraging cutting-edge tools like Genus, Innovus, and DC_shell to optimize complex digital circuits. My expertise spans Static Timing Analysis (STA), floorplanning, place-and-route, and power optimization, with hands-on experience in advanced node technologies like TSMC’s 6nm and 28nm. At MediaTek, I managed a design with 838K cells, achieving a target frequency of 230 MHz, while ensuring design integrity through rigorous quality checks. As a Physical Design Intern at SumedhaIT, I optimized power plans and resolved timing violations, contributing to efficient and reliable designs. Beyond my technical skills, my achievements as a national swimmer and school leader have instilled in me discipline, teamwork, and resilience—qualities that drive my professional success. I am passionate about innovation and continuous learning, always seeking to contribute to groundbreaking projects in the semiconductor industry. Let’s connect and explore how we can collaborate to shape the future of technology! Call to Action : Interested in discussing physical design, synthesis, or career opportunities? Feel free to reach out—I’d love to connect!