Ivan Rezki

Background

About Ivan Rezki

Experienced IC design engineer. Keywords: Semiconductor, ASIC, SoC, SystemVerilog, RTL, UVM, Verification, WiFi, 802.11, CMOS. Started career as FPGA developer for CMOS Image Sensors prototyping, where main focus was on image quality for mobile cameras applications, later gradually moved to the IP verification field, where verification methodologies just started their beginnings, like OVM System Verilog library. Involved in image/video IP development by designing verification components and corresponding TB environments to make IP verified with highest coverage score. Participated in taping-out multiple CMOS Image Sensor chips. After moving to WiFi bushiness, the main verification methodology became UVM System Verilog library. Involved in different phases of chip development, like IP verification, TB environments set up, tests bring-up, coverage closure, regression running, gate-level simulation and debugging, taping-out decision making. Multiple WiFi chips were already taped-out with mine participation. Beside all the engineering experience had a managing expertise, leading a team of five engineer while developing image products. If something has to be done, do it the right way.