Jahnavi Pathuri

Background

About Jahnavi Pathuri

Currently, I'm a Graduate Student at Portland State University and my primary focus of study is in Digital IC Design. I have good foundation in the field of Electronics through my undergrad education and various courses that I took while working towards my masters which nourished me with computer knowledge in VLSI Design, Digital Design, Physical Design, Low Power VLSI, System Verilog, RTL Design. All these made me grow from naïve to expert level in VLSI field. In addition to my academic knowledge, I worked as a Verification Trainee in Maven Silicon, Bangalore, Where my duties are to learn Digital, Verilog & System Verilog Concepts and Implement in designs such as AXI, AXI Lite. Pursuing Masters in ECE - Digital IC Design, is an another level of education where an exposure to deeper side of Digital IC Design in VLSI field. TECHNICAL SKILLS: o Programming skills in Verilog and system Verilog o Experience in writing scripts in Python o Well versed with RTL coding and Testbench development o Proficient academic experience in various tools o Mentor Graphics: Questa Sim o Cadence: Conformal, Genus o Synopsys: DC, Formality o Xilinx: Vivado o Microsoft Visual Studio: Platform IO o Operating systems: Windows, Linux o Assembly Language: RISCV o Protocols: AMBA AXI, MIPS o Excellent Team Player, Strong Communication Skills, Critical Thinking and Active Listener.