Jia Li
Asic Design Intern at Amd
Based in Toronto, Canada
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Seniority
Staff
Department
Engineering
Location
Toronto
Industry
Semiconductor Manufacturing
Company size
62K
Contact information
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j•••••••@amd.com
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Background
About Jia Li
Second year Electrical Engineering student at the University of Toronto specializing in: • FPGA & Digital Design – Hardware acceleration, Verilog development, and optimizing logic for performance and efficiency. • Digital Systems, Digital Signal Processing (DSP) – Hardware architecture, signal processing algorithms. • ASIC & Mixed-Signal Design – IC development, DAC/ADC interfacing, and high-speed digital circuit design. Incoming ASIC Design Intern @ AMD
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