Jianbo Wang

Background

About Jianbo Wang

Semiconductor test engineer with a PhD in Physics. More than 16 years’ professional experience with various Automatic Test Equipment (ATE) platforms and test development software for analog and mixed-signal integrated circuits. Areas of Expertise: • ESD test ISO10605) ESD protection• Surge test and burst test Automatic Test Equipment (ATE) hardware and software design• Test software program development• Board layout and characterizations for wafer level and packaged forms• ATE hardware debugging and troubleshooting• Debugging new silicon• Post-silicon validation Skills:• Ability to manage and prioritize multiple projects simultaneously • Effective self-learner and quick problem-solver• Multi-interface programming: I2C, SPI, UART, SMAAT, NVM • Computer Languages: C, C++, Java, PERL, Pascal• Operating Systems: Linux, Windows, UNIX• PCB design & simulation tools: VeriBest. MentorGraphics, Cadence, Altium, TINA-TI Spice • Digital programmable device design: State machine design, Altera HDL, Altera FPGA, Verilog HDLATE platforms: Piranha SZ 3610, SZ M3650, VLCT (TI made), Eagle Tests (Teradyne ETS364), Short Learning Curve Test products: Gamma Buffer, Comparator, Voltage References, Power Amplifiers, Current Sensors, Temperature Sensors Specialties:Analog and Digital IC Design, Debugging Hardware and Software Problems, Data Analysis, Failure Mode Effect Analysis (FMEA), ATE Test Engineering, Test Program Development, Top-Level Chip Integration, IC Test, Semiconductor Test Methodology, Electronic Engineering Fundamentals, Design for Test (DFT)