Jiss Joseph
Verification Engineer at Synaptics Incorporated
Based in United Kingdom
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Seniority
Staff
Department
Information Technology
Location
United Kingdom
Industry
Semiconductor Manufacturing
Company size
2.2K
Contact information
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j•••••••@synaptics.com
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Background
About Jiss Joseph
I am a highly motivated VLSI Engineer with over three years of professional experience in IC verification, digital design, and automation. Skilled in SystemVerilog, UVM, and Python scripting, I have successfully contributed to the verification of complex SoC designs, resolving timing violations, power-aware simulations, and debugging GLS environments. With a Master's degree in Electrical and Electronic Engineering, I bring a strong academic foundation and hands-on expertise in FPGA prototyping, microcontroller-based systems, and AMBA protocols. Passionate about innovation in the semiconductor industry, I strive to deliver robust and efficient solutions that align with cutting-edge technological advancements.
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