Jody Everett

Background

About Jody Everett

IC designer with experience in mixed signal and digital audio integrated circuit design. Projects include: i.MX38-ARM1176JZFS based applications processor: Developed synthesis methodology to bring up on Cadence Palladium emulator. Developed premliminary Palladium compile and run scripts. Developed Palladium testbench modules to allow screen and logfile display of verification test results. i.MX27-ARM926EJ-S based applications processor: Assisted China team in boot ROM verification on Cadence Palladium emulator. Worked with Cadence engineers to bring up Emulator-PC interface using Cadence USB bridge board. Completed productization of the digital portion of Freescale's award winning FSA95601 class D amplifier controller. This included: 1. Implementing design changes based on feedback from system architects, validation engineers, and customers. Full chip verification of all design changes. This included C model updates, new verification test development, implementation of changes on a Xilinx FPGA platform (RTL modification, FPGA synthesis, simulation, FPGA place and route, and bit file generation). Development of production test patterns. Led effort to develop the DSP56371 and DSP56374 audio digital signal processors. This included: 1. Working with teams in Australia, China, and the US to bring chip parts together. Development of testbench modules to support verification, development of top level verification tests. Verfication of both RTL and gate level models. Production test development. Worked with product and test engineering teams to verify test usability on production tester. Specialties-Verilog/VHDL RTL design -Verification(both simulation and emulation)-Mixed signal integrated circuits-Audio DSP(digital signal processor) architecture -I2C, SPI,and I2S digital interfaces' Tools-Cadence Palladium emulator, NCSIM -Synopsys Synplicity, Formality, DC_shell, VCS, Tetramax -Xilinx ISE, Chipscope, ML605 board.