Jun Liu
Sr Staff Circuit Designer at Xilinx
Based in Cupertino, United States
7-day free trial · no credit card
Seniority
Staff
Department
Information Technology
Location
Cupertino
Industry
Semiconductor Manufacturing
Company size
1.7K
Contact information
Reveal Jun's email and phone
Direct contact data is gated. Sign up and reveal. You only pay for verified records.
j•••••••@amd.com
Phone
5 credits+1 ••• •••• ••••
You only pay for valid records. Bounced emails and disconnected numbers cost nothing.
Background
About Jun Liu
Circuit Design - Global Circuit Issue & Methodology - EM/IR, Decap Allocation & …
Decision-makers
Other people at Xilinx
- JTManager
Jacqueline Torres
Office Manager · Operations
- MTStaff
Mason Tsai
Sr Packaging Design Engineer · Engineering
- VCStaff
Vinay Chinta
Senior Design Engineer · Engineering
- XLOther
Xiaoming Liang
Business Development Senior Manager, Asia Pacific Region · Other
- GHOther
Gary Hom
Analog Mixed Signal Phy i o Design Engineer · Other
Build a list of verified contacts at Xilinx
Free for 7 days · 50 credits · no card · only pay for verified records.
Reach more buyers like Jun
250M+ professionals with verified email and phone. You only pay for records that actually verify.
7-day trial · no credit card · cancel anytime