Mark Keyse
Sr Staff Engineer Digital Asic Design at Borgwarner
Based in Cincinnati, United States
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Seniority
Other
Department
Other
Location
Cincinnati
Industry
Motor Vehicle Manufacturing
Company size
19K
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m•••••••@borgwarner.com
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Background
About Mark Keyse
I have worked in the semiconductor industry for 45 years, primarily doing digital design for mixed-signal custom ASICs and FPGAs targeted for aerospace and automotive applications. I have extensive experience using SystemVerilog for both design and verification. Have experience designing communication interfaces, custom memory interfaces, digital control of buck/boost/isolated gate drive power supplies, filtering applications such as CIC filtering, high voltage sensing and sensor interfacing. Project involvement is typically from concept through stable production. Have used Cadence, Siemens (Mentor Graphics) and Synopsys tools for simulation, logic synthesis, linting, code coverage, and fault coverage. Have used Perl for general scripting and for automated Verilog testbench and RTL code generation. Co-inventor on 15 US Patents geared towards automotive applications
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