Mike Phan

Background

About Mike Phan

ASIC Design Engineer with broad experience in all aspect of ASIC development, from specification to post-silicon lab bringup. Experienced in the design and implementation of various ASIC applications such as mass storage, micro-controller subsystem, wireless networks (WIFI 802.11a/b/g/n and UWB 802.15), and Ethernet networks MAC/IP/TCP/UDP. Extensive experience with ARM, OpenRISC, Intel and Motorola processors architecture for embedded CPU subsystem design. Specialties: Verilog/VHDL design, system architecture, micro-architecture, synthesis, pre/post timing analysis and closure, verification, gate level simulation and lab bringup. Excellent knowledge of ASIC design flows and methodologies. Experienced in micro-controller subsystem design with embedded ARM and other processors. Familiar with System Verilog.