Muhammad Zeeshan Abid

Project Engineer at Sep System House Factory For Electric Panels

Based in Riyadh, Saudi Arabia

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Seniority

Staff

Department

Engineering

Location

Riyadh

Industry

Appliances, Electrical, and Electronics Manufacturing

Company size

655

Contact information

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Email

1 credit

m•••••••@sep.com.sa

Phone

5 credits

+966 ••• •••• ••••

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Background

About Muhammad Zeeshan Abid

Experienced Project Manager skilled in Project Management, Negotiation, Value Engineering, Contractors, and Project Estimation. Strong program and project management professional with a Master’s Degree focused in Electrical Engineering from NUST University, with a proven track record of ensuring projects are delivered to the highest quality, within the project timeline by effectively leading, managing, and utilizing all resources by motivating and influencing a team. Managing Projects related to EHV (Control & Protection Panels), Telecom (MPLS-TP, MDF, DVM Panels) SAS, and PSA. Responsible for Delivering Projects until commissioning within the delivery time period and arranging the necessary tools to complete projects on time. Preparation of Project Budgets and managing the Projects from Base Design to Detail Designs with the Design team and ordering materials as per Project requirements. Responsible for managing the team and completing the project on the allocated budget. I have Published research Journals with renowned publishers. Published a Journal Paper on the Design, Sizing, and Economic feasibility of a hybrid PV/diesel Water Pumping System For farmland in California. Published a Journal Paper on the Design of Islanded Hybrid Micro-grid and Analyzing its Socio-Economic Technical and Environmental Aspects for Off-grid Electrification in Developing Countries. Techno-Economic Feasibility and Environmental Studies of PV and Wind Projects. I have a working knowledge of several different Industrial software, TIA Portal, AUTOCAD, HOMER, PV SYST, AUTOCAD, Proteus, ARDUINO, and ORACLE PRIMAVERA. Basic Python, C++, Matlab, Verilog HDL.

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