Muralidhar Narayan

Background

About Muralidhar Narayan

26 years of hands-on experience in SOC/IP Design, Pre-Silicon Verification & Post-Silicon ValidationSOC Lead/Manager for 6 First Silicon Success across 64-Bit RISC Processor, Low-Power Wi-Fi IOT SOC, Ethernet, Motor Control & General purpose SOC’sExperience in building SOC Design, IP Design, Pre-Silicon Verification & Post silicon Validation teams from scratch. 12 years of Team management, Program Management & stakeholder management experience. Good understanding of CPU, MPEG4 Video IP’s, Embedded Security, Embedded Connectivity (Wi-Fi), Embedded Capacitive Touch Architecture. New product program manager experience from Specification to Tape-out, Silicon bring-up, SW/HW bring-up, ATE bring-up, Software stack & other collaterals deliverable till Release to Production.Expertise as SOC Lead in Managing across multiple disciplines for Silicon delivery. Expertise in Verilog, System Verilog based RTL design, Lint, CDC Design checks at SOC level.Expertise in UPF, VC-LP, Low-Power Synthesis, STA, Low-Power Formality checks at SOC level.Expertise in C, System Verilog, VMM based SOC Verification & Low-Power UPF based verification.Expertise in System Validation of AES, RSA, ECC based Encryption/Decryption Engine & Capacitive Touch Engine. Expertise in silicon bring-up, JIRA based Bug triaging & Silicon Debug across multiple SOC. Expertise to Microchip proprietary dsPIC CPU, MIPS, Cortex-M4, Intel i860 CPU Subsystems.Knowledge in MPEG2/MPEG4, Wi-Fi, Ethernet, USB, SPI, I2C, PWM, ADC, Flash Subsystems.Knowledge in interconnect Fabric for Multi-master, Multi-target SOC’s.Knowledge of Advanced Computer Vision & NLP Applications from AI/ML post-graduation.