Naveen Nagarapu
Field Application Engineer at Analog Devices
Based in Hyderabad, India
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Seniority
Staff
Department
Information Technology
Location
Hyderabad
Industry
Semiconductor Manufacturing
Company size
26K
Contact information
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n•••••••@analog.com
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Background
About Naveen Nagarapu
Having 2.5+ Years ( 1+yr in Hardware Design and 1+yr in Electrical engineer) in hardware design and Electronics systemsManaged and improved Type C AICs schematics, netlists, Bill of materials and collaborated with other DEs as Schematic Integrator in RVP development.Contributed to Reference validation Platform development of Intels’s next gen client SOC.Reviewed PCB Layouts of UBB-Core, SSD and TCSS AIC boardsDocumented platform HAS and TCSS user manual. Appreciated for my efforts in BOM optimization on TCSS AICs for achieving low-cost initiatives.Analysed PnP of DRAM and DRAM SSDs and HMB analysis under different workloads.Researched on EMI issue and its mitigation in DC/DC VRs Enabled Novel EMI Gasket characterization method in Intel EMC lab.Hands on experience in Power Electronics DC/DC converters and Inverters.Designed and Simulated 3D model of EMI test setups in HFSS Experience in developing and implementing various analog control techniques like voltage mode control, current mode control, peal/valley current control for DC/DC converters.
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