Nitisha Jain
Rtl Design Engineer at Block
Based in United States
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Seniority
Staff
Department
Engineering
Location
United States
Industry
Financial Services
Company size
12K
Contact information
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n•••••••@block.xyz
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Background
About Nitisha Jain
MSEE graduate with specialization in VLSI with 4 years of experience in semiconductor industry.Skills:Programming languages: Verilog, SystemVerilog, C, Assembly language, MATLABFPGA platform: HAPSScripting language: PythonCommunication Protocol: PCIe, NVMe, AXI, EMIF, DDR4 EDA Tools: Synplify, Protocompiler, Vivado, Xilinx Vivado design suite, Xilinx ISE, Altera Quartus II, ModelSim, Synopsys VCS, MultiSimOperating System: Windows, Unix/LinuxExpertise: FPGA design flow, RTL verification, DSP, SoC development, static timing analysis (STA) and optimization, synthesis, placement and routing, Video Codecs.
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