Paul Barnes

Background

About Paul Barnes

Broad base of management and physical mask design experience specializing in full custom analog, RF, and complex mixed signal circuits. Experience in multiple silicon (CMOS, Bipolar) process technologies including 16nm deep submicron CMOS. Team player with consistent record of outstanding program execution and on time project completion. Specialties: Expertise in all phases of IC physical design including wire bond/flip chip packaging, floor planning, digital design implementation, circuit block schematic capture/layout, place and route, chip assembly, physical verification (LVS/DRC/DFM), manufacturing foundry interface. Experience staffing, managing, developing, motivating teams. Demonstrate outstanding leadership, written/oral communication skills, attention to detail. Project management experience coordinating activities of multiple design groups in different geographies. Expertise in Microsoft Office tool suite (Word, Excel, PowerPoint, SharePoint), Microsoft Project, IC Design Tools: Cadence Composer, Virtuoso, Virtuoso XL; Mentor Graphics Calibre LVS, DRC, RVE, DESIGNrev; Unix/Linux OS, shell/awk programming.