Peter Li

Sr Soc Physical Design Engineer at Samsung Electronics America

Based in San Jose, United States

View on LinkedIn

7-day free trial · no credit card

Seniority

Staff

Department

Engineering

Location

San Jose

Industry

Computers and Electronics Manufacturing

Company size

10K

Contact information

Reveal Peter's email and phone

Direct contact data is gated. Sign up and reveal. You only pay for verified records.

Email

1 credit

p•••••••@••••••.com

Phone

5 credits

+1 ••• •••• ••••

You only pay for valid records. Bounced emails and disconnected numbers cost nothing.

Background

About Peter Li

Executive and passionate Silicon Valley professional in ASIC physical design leader with expertise in all facets of high speed, high gate density and high pin count chip design, complete ASIC physical design flow from RTL to tape out, RP and customized macro design. TSMC N16, N10 and beyond advanced tech nodes within high-profile corporations. Skilled in collaborating with all members of the organization to achieve business and financial objectives. Instrumental in streamlining and improving processes, enhancing productivity, and implementing technology solutions. Technical Proficiency in Synopsys DCG, ICC, ICC2, ICV, StarRc and PT, Cadence synthesis and ATPG.

Decision-makers

Other people at Samsung Electronics America

Browse the Samsung Electronics America team →

Build a list of verified contacts at Samsung Electronics America

Free for 7 days · 50 credits · no card · only pay for verified records.

Start free

Reach more buyers like Peter

250M+ professionals with verified email and phone. You only pay for records that actually verify.

7-day trial · no credit card · cancel anytime

Peter Li Email & Phone Number @ Samsung Electronics America | Kipplo Discover