Piyush Agarwal
Principal Design Engineer at Cadence
Based in Hyderabad, India
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Seniority
Staff
Department
Engineering
Location
Hyderabad
Industry
Software Development
Company size
12K
Contact information
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p•••••••@cadence.com
Phone
5 credits+91 ••• •••• ••••
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Background
About Piyush Agarwal
Strengths: End-to-end product ownership, Quest to deliver state-of-the-art products, Working with cross-functional teams, Fast ramp-up of junior engineers, Documentation Process nodes experience: 18A-130nm Number of tape-outs: 11 Patent- Adaptive frequency scheme to improve charge pump regulation system current and power efficiencies by 20% Leadership Roles- • Samsung Semiconductor: Ramped-up 3 new hires to take IP ownership independently • Texas Instruments: Complete product ownership involving specification derivation, architecture feasibility, IP design closure and reviews, system level simulations and verification, spearheading layout and verification teams, and mentoring 2 new college recruits • Cirel Systems (now Micron Technology): Design Lead for Li-ion battery charger IC
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