Pragnesh Patel
Senior Asic Design Engineer at Nvidia
Based in Santa Clara, United States
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Seniority
Staff
Department
Engineering
Location
Santa Clara
Industry
Computer Hardware Manufacturing
Company size
10001+
Contact information
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p•••••••@nvidia.com
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Background
About Pragnesh Patel
Graduate from UT Austin with a Master's degree in ECE and currently working with the Power ASIC team at Nvidia. I previously worked at SiFive for one year as an ASIC Design Engineer prior to starting my MS.I am an Electronics enthusiast at heart with a deep interest in Digital Design, Computer Architecture, and GPU/CPU/SoC/FPGA Design. I have considerable RTL development experience and I am proficient in Verilog and C/C++.
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