Pratik Ladani
Senior Physical Design Engineer at Sevitech
Based in Bengaluru, India
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Seniority
Staff
Department
Engineering
Location
Bengaluru
Industry
Semiconductor Manufacturing
Company size
218
Contact information
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p•••••••@ust.com
Phone
5 credits+91 ••• •••• ••••
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Background
About Pratik Ladani
Overall 8+ year experience in ASIC Physical design(netlist to GDSII). Tech node work exp: 28nm,16nm, 7nm Worked with various tools : PnR: Cadence Encounter,Innovus, Magma Talus, Mentor Graphics Olympus. STA: PrimeTime (PTSI DMSA) Physical verification: Calibre/IC Validator IR : Apache Redhawk Worked on networking/wireless chip Worked on FC timing closure Hands-on TCL/PERL/Unix
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