Rajeev P.
Principal Engineer at Western Digital
Based in India
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Seniority
Director
Department
Engineering
Location
India
Industry
Computer Hardware Manufacturing
Company size
23K
Contact information
Reveal Rajeev's email and phone
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r•••••••@westerndigital.com
Phone
5 credits+91 ••• •••• ••••
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Background
About Rajeev P.
Analog and Digital Mask Layout design Engineer. Worked on 3nm, 5nm, 7nm, 10nm.technology nodes. Analog Blocks: FIVR, PLL, Rx-block, DFE, CDR. Memory: Bit cell, decoders.
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