Rishab Kapil
Physical Design Engineer at Apple
Based in San Jose, United States
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Seniority
Staff
Department
Engineering
Location
San Jose
Industry
Computers and Electronics Manufacturing
Company size
168K
Contact information
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r•••••••@apple.com
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Background
About Rishab Kapil
Electrical and Computer Engineering Grad Student at Purdue University. Currently focusing on VLSI(Front-end and Back-end) and Computer Architecture. Experienced in Physical Design flow and worked on TSMC's 16 FFC and N5P. Worked on Physical Design of designs involving Memory Network on Chip, Machine Learning partition, Passive Optical Network (PON) algorithms, Video Processing Unit, Arm A78 core. Technical Skills: Synthesis, LEC, Floor-Planning, Placement, CTS, Routing, Timing & Functional ECO, Physical & Timing DRV Closure, Power/EM/IR analysis. CAD Tools: Synopsys Design Compiler, Fusion Compiler, Formality, IC Compiler II, Prime Time; Cadence Virtuoso, Conformal, Calibre. Software Skills: Verilog, VHDL, Tcl, C, C++, Shell Scripting.
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