Robin Chohan
Layout Design Engineer (Contractor) at Ciena
Based in Ottawa, Canada
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Seniority
Staff
Department
Other
Location
Ottawa
Industry
Telecommunications
Company size
10K
Contact information
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r•••••••@ciena.com
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Background
About Robin Chohan
Semiconductor Professional with 8 years of Experience in Full Custom Layout Development. • Expertise in leading and planning Layout Development of Memory Compilers in various FinFet node down to 3nm for the multiple leading foundaries such as TSMC, SAMSUNG, INTEL, GF. • Well Versed with physical validations and design tools of SYNOPSYS, CADENCE, Mentor Graphics. • Performed physical validations and reliability checks on designed Layouts & Memory Macros (DRC, LVS, ANTENNA, LEF, LVL, ERC, IR, EM, DFM, RC Extraction). • Effectively applied new techniques to develop customized automations and methodologies using Perl and shell scripting for improving Quality and Efficiency. • A team player who collaborated with various teams across the globe. • Received multiple awards for valuable contributions in Sankalp Semiconductor and Synopsys. • Mentored subordinates toward achieving project goals and technical excellence.
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