Sameer Shaik
Ip Logic Design Engineer at Intel Corporation
Based in Portland, United States
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Seniority
Staff
Department
Engineering
Location
Portland
Industry
Semiconductor Manufacturing
Company size
110K
Contact information
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s•••••••@intel.com
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Background
About Sameer Shaik
IP Logic Design Engineer at Intel with experience in RTL design, formal verification, and SoC integration. I am an expert in making high-quality RTL IPs with parameters, cleaning up lint and CDC, integrating interfaces, and utilizing Cadence Formality to verify for formal equivalence when implementing ECOs. I've worked on fuse programming and CRC validation for IP bring-up, and I've worked with verification teams to fix UVM environments and make SystemVerilog Assertions with JasperGold. I know how to use Verilog, SystemVerilog, Python, and other industry-standard tools. I'm passionate about making sure designs are valid, automating processes, and creating scalable, production-ready IPs for the latest semiconductor technologies.
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