Sherif Eissa

Concept Engineer (Product Architecture) at Innatera

Based in Eindhoven, Netherlands

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Seniority

Other

Department

Other

Location

Eindhoven

Industry

Semiconductor Manufacturing

Company size

121

Contact information

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Email

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s•••••••@innatera.com

Phone

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+31 ••• •••• ••••

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Background

About Sherif Eissa

Concept engineer at Innatera. PhD student in neuromorphic computing. I am an electronic systems engineer, specializing in digital architecture design. During the last 5 years, in my M.Sc thesis and PhD, I have been working on making deep learning more energy efficient with hardware, mapping, and model optimization, with my PhD focused on neuromorphic design. In my B.Sc and M.Sc, I had the best grades of my class. I enjoy learning and problem solving, and I have a passion for mathematics. Research interests: Computer architecture, edge AI acceleration and mapping, deep learning, image processing, and data encoding Master Thesis: Sparsity investigation for CNN accelerators on FPGA using HLS, Bosch Research Campus, Renningen, Stuttgart. Bachelor Thesis: Characterization and measurement of readout chip for in vivo biosensor, IMS-Chips, University of Stuttgart.

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