Smiti Sachdeva Sehgal

Background

About Smiti Sachdeva Sehgal

Experienced Researcher with a demonstrated history of working in the research industry. Strong research professional with a Doctor of Philosophy (PhD) focused in Electronics Engineering from Thapar University, Patiala and CSIR-CEERI, Pilani. Currently working as a Senior Staff Engineer (STA) at Synopsys. CORE COMPETENCIES Design & Verification Tools: Proficient in Cadence EDA Tools, Virtuoso Suite, Pegasus & PVS DRC/LVS, and Assura DRC/LVS; extensive experience with cross-functional design and verification workflows. Layout & Verification: Expertise in Analog Layout Design, Placement and Routing, Netlist Translation, and Physical Verification for ensuring optimal circuit performance. Scripting & Debugging: Skilled in UNIX Shell Scripting, SKILL Programming, and debugging complex circuit design issues; adept at automating processes to enhance efficiency. Specialized Expertise: In-depth knowledge of MOSFET, CMOS, and FinFET technology nodes; Physical Verification (DRC/LVS/ERC/PERC), EMIR Flow, and PDK Handling for advanced technology nodes; proven experience working with PDKs, including GF, TSMC, and Cadence PDKs. Soft Skills: Strong Verbal and Presentation Skills, technical mentoring and training, effective knowledge database creation, and collaborative problem-solving in diverse teams.