Srinithi Narayanan
Analog Layout Design Engineer at Capgemini Engineering
Based in Bengaluru, India
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Seniority
Staff
Department
Engineering
Location
Bengaluru
Industry
Engineering Services
Company size
45K
Contact information
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s•••••••@••••••.com
Phone
5 credits+91 ••• •••• ••••
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Background
About Srinithi Narayanan
Worked on 22nm, 14nm, 10nm, 7nm intel tech nodes.Worked on SADC, CTRL, LDO, PLL blocks.Have good knowledge in IR-Drop, EM, self - heat, antenna, RV, Latch up.Experience in Mentoring & training.
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