Stephen Chan

Asic and Fpga Design Engineer at Boeing Defense, Space & Security

Based in San Marino, United States

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Seniority

Staff

Department

Engineering

Location

San Marino

Industry

Business Consulting and Services

Company size

2.9K

Contact information

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Email

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s•••••••@boeing.com

Phone

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+1 ••• •••• ••••

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Background

About Stephen Chan

ASIC and FPGA Design Engineer with extensive experience in ASIC design flow, digital logic design, IP integration in SoC, and prototyping ASICs on Xilinx FPGAs. TECHNICAL SKILLS: • Languages : SystemVerilog, Verilog, VHDL, C, C++, SystemC • Scripting : Make, PERL, Python, Tcl/TK • Simulation / Verification : coreConsultant, Questa, ModelSim, Xcelium, NCSim, SimVision, UVM, HSPICE, Debussy, Verdi • Backend Tools : Synopsys Design Compiler, PrimeTime, SpyGlass, Conformal LEC • FPGA Tools : Xilinx Vivado ML Design Suite • Analog Tools : Cadence Virtuoso AMS Designer • Revision Control Systems : ClearCase, SVN • Other Tools : MATLAB, Visual C++, Office, IBM DOORS, Atlassian JIRA, Agnisys IDesignSpec • Operating System: UNIX, LINUX, Windows • Communication protocols: AXI, UART, SPI, I2C, MDIO, SpaceWire, ARINC 664 • High speed interfaces: ESIStream, SERDES, PCIe Gen3

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