Subhasish Mukherjee

Background

About Subhasish Mukherjee

Developed extensive expertise in modifying benchmarking tools such as NeuroSim, tailoring them for end-to-end transformer applications. Adapted tool functionalities to accommodate the unique computational requirements of transformer architectures, enabling more accurate performance evaluation and latency profiling for emerging NLP models. Leveraged deep understanding of tool internals to enhance the benchmarking pipeline, optimizing it for the analysis of transformer efficiency at various stages, from data preprocessing to model inference. • Currently engaged in developing a comprehensive behavior simulator designed to compute latency and energy consumption for end-to-end Deep Learning and NLP applications. This simulator leverages foundational hardware modules and user-modifiable configuration files to flexibly model different architectural scenarios. By integrating custom configuration options, it enables detailed, application-specific insights into hardware efficiency and performance, supporting the optimization of both model and hardware parameters for improved computational efficiency in Deep Learning and NLP workflows. • My overall research focuses on advanced compute-in-memory (CIM) architectures, particularly those leveraging FeFETs and DRAM-like memory cells. • Interested in optimizing analog computation mechanisms to mitigate the challenges of current-domain approaches, while exploring novel techniques for non-volatile and volatile memory integration. • My work includes applying these CIM technologies to accelerate large language models (Transformers), with a specific focus on reducing energy consumption, improving computational efficiency, and eliminating costly data transfers. • Additionally, I investigate the use of 1FeFET-1C arrays for implementing arithmetic operations and look-up tables, as well as strategies to avoid FeFET write overhead and latency in deep learning pipelines.