Sy Tran

Wafer Sort & Final Test Pcb Hardware Technology Development Lead - Mts Product Development Engineer at Amd

Based in Austin, United States

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Seniority

Manager

Department

Information Technology

Location

Austin

Industry

Semiconductor Manufacturing

Company size

48K

Contact information

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Email

1 credit

s•••••••@amd.com

Phone

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Background

About Sy Tran

Many years of experience in hand on PCB hardware design with the expertise in advanced signal integrity, best in class board level design, and million dollar project managements• Able to analyze/resolve technical complex problems, work under pressure, prioritizes multiple projects, and fully accountable for deliverable and decisions• Lead team and provide technical guidance on test load board design across international design sites, and gain recognized contribution at all levels of the CPU, APU, GPU, Server, and Semi-custom organizations• Self-motivated team player with strong analytical/problem solving, organizational, cross-functional communications, and interpersonal skillsTECHNICAL SKILLS• Design Tools: Cadence Concept Schematics Capture, Allegro Layout, View Logic, P-Cad, OrCAD, Polar Impedance SI, Saturn PCB Toolkit, ViewMate, AutoCad, and SolidWorks• Test Equipments and Testing Methods: Verigy 93K Pin Scale, Advantest Teradyne J973, J971, J953, LTX Sapphire tester, Delta Flex handler, Seiko Epson handler, Hontech handler, Delta Summit Handler, Delta ECT Thermal, TEL XL Prober, Scorpion flying probe tester, LeCroy TDR, Hyperlinx, and J-BERT• All lab work equipments

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