Taranitharan Thiruselvan
Senior Defect Reduction Engineer at Intel Corporation
Based in Bayan Lepas, Malaysia
7-day free trial · no credit card
Seniority
Staff
Department
Engineering
Location
Bayan Lepas
Industry
Semiconductor Manufacturing
Company size
110K
Contact information
Reveal Taranitharan's email and phone
Direct contact data is gated. Sign up and reveal. You only pay for verified records.
t•••••••@intel.com
Phone
5 credits+60 ••• •••• ••••
You only pay for valid records. Bounced emails and disconnected numbers cost nothing.
Background
About Taranitharan Thiruselvan
At Intel Corporation, our team pioneers advanced packaging technologies, enhancing yields in high-volume manufacturing. Collaboration with Process Integration and Yield Analysis teams enables us to identify and mitigate systematic defects, ensuring production meets yield targets. Our strategies are critical in transitioning processes from start-up to full-scale production across multiple sites. Holding a Bachelor of Engineering in Polymer Engineering, my background enriches our engineering projects, bringing a strong foundation in polymer science to the high-tech realm of semiconductor manufacturing. With competencies in SMT and defect management, I am dedicated to driving innovation and quality.
Decision-makers
Other people at Intel Corporation
Build a list of verified contacts at Intel Corporation
Free for 7 days · 50 credits · no card · only pay for verified records.
Reach more buyers like Taranitharan
250M+ professionals with verified email and phone. You only pay for records that actually verify.
7-day trial · no credit card · cancel anytime