Tim Sperber
Design Verification Engineer at Intel Corporation
Based in Boston, United States
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Seniority
Staff
Department
Information Technology
Location
Boston
Industry
Semiconductor Manufacturing
Company size
110K
Contact information
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t•••••••@intel.com
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Background
About Tim Sperber
Verification - test plan development and execution, testbench, checker, BFM/agent development and implementation and RTL debug Technology areas - SSD controller ASICs - Phy of on chip memory controllers supporting Fully Buffered DIMM (FBD) and DDR for Intel Itanium and Xeon server microprossesors - OC-192 SONET processor ASIC - L2 cache controller/coherency block in system interface for last generation DEC Alpha (EV7) microprocessor
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