Tom Pham

Ic Design at Pericom Semiconductor - Now A Part Of Diodes Incorporated

Based in San Jose, United States

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Seniority

Staff

Department

Engineering

Location

San Jose

Industry

Semiconductor Manufacturing

Company size

173

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t•••••••@diodes.com

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Background

About Tom Pham

Design experienced 1/ low power SRAM design. 2/ NOR flash memory design 3/ Low power capless LDO in CMOS 90nm design 4/ Low voltage bandgap, voltage reference design 5/ High Frequency, low power PLL design in CMOS 90nm design 6/ Low power 16bits pipeline AD Converter in 90nm design 7/ Buck DC to DC converter design. 8/ Low power voltage reference for RFID application in smic 65nm.* Input voltage range: 1v to 2.5v * Output voltage: 0.5v * Line regulation: 3mV/V * TC (ppm/C): 5ppm (from -50C to 100C)* Power: 5.42nW @1.2V * PSRR: 60dB @ DC, 50dB @ 1kHz 9/ Low power capacitorless for RFID application in smic 65nm.* Input voltage range: 1v to 2.5v * Output voltage: 0.998v * Line regulation: 8mV/V * Load capability: 40uA * Load regulation: 5mV/40uA * TC (ppm/C): 6ppm (from -50C to 100C)* Quiescent current: 52nA @ 25C Knowledge of Verilog and RTL synthesis. Matlab and Simulink, Hspice, Hsim, Finesim. Cadenc IC layout, LVS, DRC,PCB layout in Altium.

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