Verified recordHigher Education

Udaiyakumar Ramamoorthy

Kathir College of Engineering at Kathir College Of Engineering

Based in Coimbatore, India

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Seniority

Other

Department

Other

Location

Coimbatore

Industry

Higher Education

Company size

136

Contact information

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Email

1 credit

u•••••••@kathir.ac.in

Phone

5 credits

+91 ••• •••• ••••

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Background

About Udaiyakumar Ramamoorthy

I am an efficient and confident academic administrator with demonstrated experience of heading engineering department and Institution. My experience in education field has helped me in introducing a lot of novel ideas towards better ranking and accreditation of my associated organizations. I am highly motivated to continue learning and improving my craft towards Education 4.0 preparedness Currently working as Principal in Kathir College of Engineering (affiliated to Anna University), Coimbatore and holding additional responsibility as Chief Learning Officer at E-Box Learning Services (P) Ltd, Coimbatore. Worked as Professor & Head in Department of Electronics and Communication Engineering, Sri Krishna College of Technology, Coimbatore Having 23 years of Experience in the area of Microelectronics and VLSI design as Design Engineer and as Senior Faculty at PG level National and International Institutions across the country. Responsible for accreditation, ranking, approval and affiliation processes at Sri Krishna College of Technology, Coimbatore Published 4 patents and many papers in refereed International Journals such as Elsevier, Springer and IOS Press (20 international publications which are Scopus and WoS/SCI indexed with cumulative impact factor of 23.93) Recognized Research Supervisor of Anna University, Chennai Having practical experience and excellent insight in NBA accreditation under OBE model and NIRF ranking procedures as Institution Co-ordinator and Nodal Officer respectively. Reviewer for many WOS and Scopus indexed refereed international Journals including Elsevier, Springer, ACM transactions and Wiley. Awarded Top Performing Mentor for Jul-Dec 2017 in IIT Madras-NPTEL examinations for the course on “Outcome based Pedagogic Principles for effective teaching” where mentees as Toppers/Gold medallists. Involved in various Projects and IP core developments in the area of VLSI. Trained at Cadence Design Systems India (P) Ltd, Bangalore with Cadence IUS and SOC Encounter Completed PhD [Faculty of Information and Communication Engineering] in Low Power VLSI Design area under Anna University, Chennai (March 2014) Passed M.E [First Class with Distinction-80%] Applied Electronics [Faculty of Information and Communication Engineering Specialization from BIT-Sathy, Anna University, Chennai (April 2006). Passed B.E [First Class-70%] Electrical and Electronics Engineering from Thiagarajar College of Engineering (Autonomous), Madurai Kamaraj University, Madurai (April 1997).

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