Veeru S.
Layout Lead at Micron Technology
Based in Sacramento, United States
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Seniority
Manager
Department
Information Technology
Location
Sacramento
Industry
Semiconductor Manufacturing
Company size
36K
Contact information
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v•••••••@micron.com
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Background
About Veeru S.
Successfully Leading and Managing layout team in the Emerging Memory group. Expertise in Memory/ Analog/ Mixed Signal Layout Designs. Worked on custom layouts, pitch cells (Sense Amp, X/Y Decoders), chip level layouts, path finding, Auto Place and Route tools, verification against design tools, parasitic matching and programming for layout automation, mainly focused on Memory, Data Converters and its sub-blocks, design of test structures for process characterization. Expertise in Layout Design of Memory core, array, pitch, periphery designs, Data converters (ADC), reference generators, PLL, Differential Amplifiers, ESD Circuits, IO Ring, Fuse Layouts, Full Chip spin off works and other analog blocks.
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