Venkatesh Kadimi
Senior Design Verification Engineer at Nvidia
Based in Santa Clara, United States
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Seniority
Staff
Department
Engineering
Location
Santa Clara
Industry
Computer Hardware Manufacturing
Company size
10001+
Contact information
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v•••••••@nvidia.com
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Background
About Venkatesh Kadimi
Working as a Design Verification Engineer in CPU memory subsystem team and responsible for development and maintenance of UVM based testbench, Assertion based Verification, Coverage Test plan and closure. Hands on experience in RTL design and all stages of verification cycle for a project - test planning, test bench development, debugging RTL simulation, coverage closure.
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