Vignesh Anand
MS - CE @ North Carolina State University | Computer Architecture & VLSI | Aspiring SOC Engineer ASIC Verification Design Verification Engineer roles at Western Semiconductor
Based in Raleigh, United States
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Seniority
Other
Department
Other
Location
Raleigh
Industry
Semiconductor Manufacturing
Company size
40
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v•••••••@westernsemiconductor.com
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Background
About Vignesh Anand
Computer Engineering Graduate Student at North Carolina State University specializing in Computer Microprocessor Architecture RTL Design and Verification. Experienced research work in Verilog FPGA microcontrollers and C++. Have a solid Engineering professional background with a Bachelor of Technology (B-Tech) focused in Electronics and Communications Engineering from Amrita University. Passionate about VLSI and driven to excel in the field. I am looking forward to leveraging my knowledge in specific semiconductor industry domains primarily in pre-silicon and post-silicon design roles and ASIC Design Verification Engineering SOC Design and verification roles. 💼 Experience: Software Developer (Java) Tata Consultancy Services • Built APIs in a cloud platform enhancing expertise in technologies like Spring: Boot/Cloud/Microservices and Docker. • Worked in an Agile environment with bi-weekly sprints following the Scrum model and actively engaged in business demos client interaction and knowledge management. 🚀 Projects: Effective Hardware Trojan Detection Methodology using Differential Evolution and SCOAP Parameters: • Proposed a low-cost technique to detect malicious tampering in Digital Logic circuits addressing undesired changes in functional behaviour. • Implemented evolutionary algorithms like Differential Evolution to expedite automatic Test Pattern Generation (ATPG) and pattern response generation. • Conducted a comparative study on Controllability and Observability parameters using ISCAS85 Benchmark Combinational circuits leveraging Python for ATPG and SCOAP parameter analysis. FPGA Prototyping using Xilinx IP.: • Implemented a digital circuit using Verilog HDL and the Xilinx Vivado tool integrating modules such as Xilinx counter IP multiplexer latch and decoder. • Successfully transferred the entire code onto an FPGA board (XC7A50T-1CSG324) employing different modelling styles like Behavioural and Dataflow.
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